EP2SGX90EF1152C3ES vs EP2SGX90EF1152C4 对比

详细并排对比 EP2SGX90EF1152C3ES 出自 Intel 和 EP2SGX90EF1152C4 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EP2SGX90EF1152C3ES EP2SGX90EF1152C3ES - Stratix II GX FPGA 90nm 558 I/O 1152-BBGA | Intel

EP2SGX90EF1152C3ES - Stratix II GX FPGA 90nm 558 I/O 1152-BBGA | Intel

EP2SGX90EF1152C3ES ⚠ 最后一次采购
Altera
EP2SGX90EF1152C4 EP2SGX90EF1152C4 - 90,960-Cell Stratix II GX FPGA

EP2SGX90EF1152C4 - 90,960-Cell Stratix II GX FPGA

EP2SGX90EF1152C4 ✓ 量产中

规格对比

参数 EP2SGX90EF1152C3ES EP2SGX90EF1152C4
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 有效
库存状态 有库存 有库存
单价(USD) $2,050.00 $890.00
Family Stratix II GX Stratix II GX
Process Node 90 nm —
Logic Elements 90,960 —
Embedded Memory 4,520,448 bits (approx. 4.5 Mbit) —
User I/O Pins 558 —
封装 1152-BBGA (FineLine BGA, 35x35 mm) —
Speed Grade C3 —
Temperature Grade Commercial Extended (-40 C to +100 C) —
Core Voltage 1.5 V (Enhanced, 'E' suffix) 1.2 V
High-Speed Transceivers Up to 12 channels (per Stratix II GX family) —
Transceiver Data Rate Up to 6.375 Gbps per channel (family spec) —
DSP Blocks Yes, dedicated 18x18 multipliers and accumulators —
PLL Count [DATA_NEEDED: PLL count for EP2SGX90 variant] —
User I/O Banks 24 (per package datasheet) —
Configuration SRAM-based, supports Fast Passive Parallel, Fast Active Serial, JTAG —
安装类型 Surface Mount (BGA) —
RoHS 状态 Compliant RoHS Compliant
Lead-Free Yes —
Product Type — Field Programmable Gate Array (FPGA)
Logic Cells — 90960 cells
Logic Array Blocks — 4548 LABs
User I/O — 558 I/O
Process Technology — 90 nm
Reported Maximum Frequency — 732.1 MHz
Alternate Reported Maximum Frequency — 717 MHz
Package Type — FC-FBGA
Package Pin Count — 1152 pins
Alternate Package Description — FBGA-1152
Package Mounting — Surface Mount
Lead-Free Status — Lead free
工作温度 — [DATA_NEEDED: operating temperature]
Transceiver Count — [DATA_NEEDED: transceiver count]
Configuration Method — [DATA_NEEDED: configuration method]

数据手册与资源

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