EP3CLS100U484C7 vs EP3C80U484C7 对比

详细并排对比 EP3CLS100U484C7 出自 Intel 和 EP3C80U484C7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EP3CLS100U484C7 EP3CLS100U484C7 - Cyclone III LS FPGA 100K LE UFBGA-484

EP3CLS100U484C7 - Cyclone III LS FPGA 100K LE UFBGA-484

EP3CLS100U484C7 ✓ 量产中

规格对比

参数 EP3CLS100U484C7 EP3C80U484C7
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $520.00 $113.50
Family Cyclone III LS EP3C80
Logic Elements 100,448 81,264
Logic Array Blocks (LABs) [DATA_NEEDED: LAB count] —
Total RAM Bits 4,451,328 —
User I/O Pins 278 —
Embedded 18x18 Multipliers [DATA_NEEDED: multiplier count] 244
PLLs [DATA_NEEDED: PLL count] 4
Process Technology 65 nm CMOS 65 nm low-power CMOS
Core Voltage 1.2 V 1.2 V
封装 484-ball UFBGA (UBGA-484), 19 x 19 mm, 0.8 mm pitch 484-FBGA (UBGA)
安装类型 Surface Mount —
Maximum Internal Frequency 437.5 MHz to 450 MHz —
Bitstream Encryption 256-bit AES (Cyclone III LS feature) —
工作温度 Commercial (0C to +85C) —
RoHS 状态 [DATA_NEEDED: RoHS status] Compliant
Configuration Interface Active Serial, Passive Serial, Fast Passive Parallel, JTAG —
Design Software Quartus II (legacy) / Intel Quartus Prime —
Series — Cyclone III
Embedded Memory — 2,810,880 bits (295 M9K blocks)
Maximum User I/O Pins — 429 (approximate, package-dependent)
Speed Grade — -7 (commercial)
I/O Voltage Range — 1.2 V to 3.3 V
工作结温 — 0 C to 85 C (commercial)
Configuration Modes — Passive Serial, Active Serial, JTAG, AES-encrypted bitstream
Memory Interface Support — DDR, DDR2, QDRII SDRAM
I/O Standards — LVDS, LVTTL, LVCMOS, SSTL, HSTL

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