EP3CLS70F484I7N vs EP3CLS70F484C8N 对比
详细并排对比 EP3CLS70F484I7N 出自 Intel 和 EP3CLS70F484C8N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP3CLS70F484I7N | EP3CLS70F484C8N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $67.50 | $56.80 |
| Family | Cyclone III LS | Cyclone III LS |
| Logic Elements (LEs) | 70,208 | — |
| Embedded Memory Bits | 3,068,928 bits | 3,068,928 bits (approx. 2,997 Kbit) |
| User I/Os | 278 | — |
| DSP Blocks (18x18 Multipliers) | 274 | 247 |
| PLLs | 4 | — |
| Maximum User I/O Pins | 294 | — |
| Process Technology | 65 nm low-power CMOS | 65 nm TSMC low-power |
| Core Supply Voltage | 1.2 V | 1.2 V |
| 封装 | 484-ball FBGA (FineLine BGA), 1.0 mm pitch | 484-ball FBGA (FineLine BGA), 23x23 mm |
| 工作温度 | -40C to +100C (Industrial, I7 speed grade) | Commercial 0C to +85C (C8 grade) |
| Configuration Mode | Passive Serial, Active Serial, JTAG | — |
| Memory Interfaces | DDR2, DDR3, QDRII+, RLDRAM II | — |
| LVDS Data Rate | Up to 875 Mbps per channel | — |
| RoHS 状态 | Compliant | Compliant |
| Device Logic Elements (LEs) | — | 70,208 |
| Logic Array Blocks (LABs) | — | 4,388 |
| Maximum User I/Os | — | 278 |
| Phase-Locked Loops (PLLs) | — | 4 |
| Global Clock Networks | — | 20 |
| Speed Grade | — | 8 (slowest commercial) |
| Configuration Modes | — | Passive Serial (PS), Fast Passive Parallel (FPP), JTAG |
| Bitstream Encryption | — | AES-256 (LS family feature) |