EP3CLS70U484I7 vs EP3CLS70U484C8N 对比
详细并排对比 EP3CLS70U484I7 出自 Altera 和 EP3CLS70U484C8N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP3CLS70U484I7 | EP3CLS70U484C8N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $52.30 | $244.20 |
| Family | Cyclone III LS | — |
| Device Type | FPGA - Field Programmable Gate Array | — |
| Logic Elements | 70,208 | — |
| Number of Logic Blocks | 4,612 | — |
| Total Memory Bits | 3,068,928 (3 Mb) | — |
| Number of M9K Memory Blocks | 247 | — |
| Number of Embedded 18x18 Multipliers | 247 | — |
| Number of PLLs | 4 | — |
| User I/O Pins | 278 | — |
| Package Type | 484-FBGA / 484-UBGA (UBGA-484) | — |
| Package Size | 19 mm x 19 mm | — |
| Ball Pitch | 1.0 mm | — |
| Core Supply Voltage | 1.2 V | 1.2 V |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.0 V / 3.3 V | — |
| 工作温度 | -40C to +100C (Industrial) | 0C to +85C (commercial) |
| Process Technology | 60 nm low-power CMOS | TSMC 65 nm Low-Power (LP) |
| Configuration Modes | JTAG, Passive Serial, Active Serial, Fast Passive Parallel | AS, PS, JTAG, FPP |
| RoHS 状态 | Compliant | Compliant |
| MSL 等级 | 3 (168 hours) | — |
| 安装类型 | Surface Mount (BGA) | Surface Mount (BGA) |
| Device Family | — | Cyclone III LS |
| Logic Elements (LE) | — | 70,208 |
| Memory Bits | — | 3,068,928 bits |
| Maximum User I/O | — | 278 |
| DSP Blocks (18x18 Multipliers) | — | 247 |
| PLLs | — | 8 |
| Global Clock Networks | — | 20 |
| Speed Grade | — | 8 (commercial) |
| 封装 | — | 484-FBGA (U484) FineLine BGA, 19x19 mm |