EP3SE50F484C2G vs EP3SE50F484C4G 对比
详细并排对比 EP3SE50F484C2G 出自 Intel 和 EP3SE50F484C4G 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP3SE50F484C2G | EP3SE50F484C4G |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $1,180.00 | $0.00 |
| Series | Stratix III E | — |
| Number of Logic Elements / Cells | 47,500 | — |
| Number of LABs / CLBs | 1,900 | — |
| Total RAM Bits | 5,760,000 (5,760 Kbit) | — |
| Number of User I/O | 296 | — |
| 封装 / 外壳 | 484-BBGA, FCBGA (FineLine BGA) | — |
| 安装类型 | Surface Mount | — |
| Core Voltage Supply | 0.86 V to 1.15 V | — |
| 工作温度 | 0 °C to +85 °C (TJ) | — |
| Process Technology | 40 nm TSMC low-power CMOS | — |
| Logic Element Architecture | Adaptive Logic Module (ALM) with 8-input fracturable LUT | — |
| Embedded DSP Blocks | Yes (variable-precision multipliers) | — |
| Transceivers | Multi-gigabit transceivers (selected package pins) | — |
| Memory Interface Support | DDR / DDR2 / DDR3 with hard PHY | — |
| Partial Reconfiguration | Supported | — |
| Configuration Interface | JTAG, Passive Serial, Fast Passive Parallel | — |
| Part Status | Active (Intel catalogue); long-term supply subject to Stratix III lifecycle policy | — |
| RoHS 状态 | Compliant | unknown |
| Product Type | — | Stratix III E field-programmable gate array |
| Technology | — | Field-programmable gate array |
| Logic Elements | — | 47,500 LE |
| Adaptive Logic Modules | — | 19,000 ALM |
| Logic Array Blocks | — | 1,900 LAB |
| Embedded Memory | — | 5.49 Mbit |
| Number of I/O | — | 296 I/O |
| 工作电源电压 | — | 1.1 V |
| Minimum Operating Temperature | — | 0 °C |
| Maximum Operating Temperature | — | +85 °C |
| 封装 | — | 484-BBGA, FCBGA |
| Ball Count | — | 484 balls |
| 安装方式 | — | SMD/SMT |
| Manufacturer | — | Intel |
| Legacy Brand | — | Altera |
| REACH Status | — | unknown |