EP3SE50F484I3N vs EP3SE50F484I4N 对比
详细并排对比 EP3SE50F484I3N 出自 Intel 和 EP3SE50F484I4N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP3SE50F484I3N | EP3SE50F484I4N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $841.66 | $998.00 |
| Family | Stratix III E | — |
| Logic Elements | 47,500 | — |
| Number of LABs | 1,900 | — |
| Total Memory Bits | 5,760,000 | — |
| Maximum User I/O | 296 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Core Voltage VCC | 0.9 V | — |
| Auxiliary Voltage VCCAUX | 1.1 V | — |
| Process Technology | 65 nm | 65 nm CMOS |
| Maximum Internal Frequency | 500 MHz | — |
| Speed Grade | I3 (industrial, bin 3) | I4 |
| 工作温度 | -40C to +100C (industrial) | 0 C to +85 C (Industrial) |
| 封装 | 484-pin FC-FBGA (flip-chip BGA) | 484-ball FC-FBGA (F484) |
| 安装类型 | Surface Mount (BGA) | — |
| Lead-Free / RoHS | Yes (N suffix) | Lead-free (per ampheo listing) |
| Configuration Method | Active serial (AS), passive serial (PS), JTAG, fast passive parallel (FPP) | — |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks] | — |
| Embedded Multipliers (18x18) | [DATA_NEEDED: number of 18x18 multipliers] | 384 |
| Transceiver Count | [DATA_NEEDED: number of embedded transceivers] | — |
| Device Family | — | Stratix III E |
| Logic Elements (LE) | — | 47,500 |
| Adaptive Logic Modules (ALMs) | — | 19,000 |
| Logic Array Blocks (LABs) | — | 1,900 |
| Embedded Memory (TriMatrix) | — | 2,136 Kbits |
| User I/Os | — | 296 |
| I/O Banks | — | 12 |
| PLLs | — | 8 |
| Global Clock Networks | — | 16 |
| Maximum User I/O Frequency | — | 800 MHz (per DigChip datasheet summary) |
| Core Voltage | — | 1.1 V |