EP3SL200F1517I4L vs EP3SL200F1517I4 对比
详细并排对比 EP3SL200F1517I4L 出自 Altera 和 EP3SL200F1517I4 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP3SL200F1517I4L | EP3SL200F1517I4 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $2,280.00 | $1,325.00 |
| Logic Elements | 200,000 | 200,000 |
| Logic Array Blocks (LABs) | 8,000 | 8000 |
| Embedded Memory (bits) | 10,901,504 | — |
| User I/Os | 976 | — |
| Number of Pins / Balls | 1517 | — |
| 封装 | 1517-BBGA, FC-FBGA (Flip-Chip) | 1517-ball FC-FBGA |
| Core Voltage | 0.9 V | 1.1 V |
| Process Node | 65 nm CMOS | 65 nm |
| Speed Grade | I4 (industrial, speed grade 4) | — |
| 工作结温 | -40C to +100C | — |
| Family | Stratix III L (logic-optimized) | Stratix III L |
| DSP Blocks / 18x18 Multipliers | 384 (18x18) | — |
| Transceivers | [DATA_NEEDED: transceiver count and max data rate] | — |
| PLLs | [DATA_NEEDED: PLL count] | — |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG | — |
| 安装类型 | Surface Mount (BGA) | Surface Mount |
| RoHS 状态 | [DATA_NEEDED: per batch] | Compliant |
| MSL 等级 | [DATA_NEEDED: per package datasheet] | 3 |
| Embedded Memory | — | 10,901,504 bits (~10.4 Mbit) |
| Maximum User I/Os | — | 976 |
| Internal Frequency | — | up to 450 MHz |
| 工作温度 | — | -40C to +100C (Industrial) |
| Supply Voltage Range | — | 0.9 V to 1.1 V core |
| Lead-Free | — | Yes |
| Device Type | — | FPGA - Field Programmable Gate Array |