EP3SL200F1517I4LN vs EP3SL200F1517I4L 对比

详细并排对比 EP3SL200F1517I4LN 出自 Intel 和 EP3SL200F1517I4L 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP3SL200F1517I4L EP3SL200F1517I4L - 200K LE Stratix III L FPGA, 1517-FCBGA | Altera

EP3SL200F1517I4L - 200K LE Stratix III L FPGA, 1517-FCBGA | Altera

EP3SL200F1517I4L ⚠ 最后一次采购

规格对比

参数 EP3SL200F1517I4LN EP3SL200F1517I4L
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 最后采购期
库存状态 有库存 有库存
单价(USD) $6,300.00 $2,280.00
Family Stratix III L Stratix III L (logic-optimized)
Logic Elements 200,000 200,000
Embedded Memory Bits 10,901,504 —
Logic Array Blocks (LABs) 8,000 8,000
User I/O Pins 976 —
封装 1517-BBGA, FCBGA 1517-BBGA, FC-FBGA (Flip-Chip)
Process Technology 65 nm TSMC low-power —
工作温度 -40C to +100C (Industrial) —
安装类型 Surface Mount (BGA) Surface Mount (BGA)
RoHS 状态 Compliant [DATA_NEEDED: per batch]
Lead-Free Yes —
MSL 等级 [DATA_NEEDED: MSL moisture sensitivity level] [DATA_NEEDED: per package datasheet]
Supply Voltage Core [DATA_NEEDED: VCC core voltage] —
Transceiver Data Rate (max) [DATA_NEEDED: max transceiver rate] —
DSP Blocks (18x18 multipliers) 384 —
DSP Performance 288 GMACS —
Configuration Method Passive Parallel / Active Serial / JTAG —
Ball Pitch 1.0 mm —
Package Dimensions 40 mm x 40 mm —
Embedded Memory (bits) — 10,901,504
User I/Os — 976
Number of Pins / Balls — 1517
Core Voltage — 0.9 V
Process Node — 65 nm CMOS
Speed Grade — I4 (industrial, speed grade 4)
工作结温 — -40C to +100C
DSP Blocks / 18x18 Multipliers — 384 (18x18)
Transceivers — [DATA_NEEDED: transceiver count and max data rate]
PLLs — [DATA_NEEDED: PLL count]
Configuration Modes — Passive Serial, Fast Passive Parallel, JTAG

数据手册与资源

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