EP3SL200H780C3N vs EP3SL200H780C4LN 对比

详细并排对比 EP3SL200H780C3N 出自 Intel 和 EP3SL200H780C4LN 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP3SL200H780C4LN EP3SL200H780C4LN - Stratix III L 200K Logic Element FPGA | Intel

EP3SL200H780C4LN - Stratix III L 200K Logic Element FPGA | Intel

EP3SL200H780C4LN ⚠ 最后一次采购

规格对比

参数 EP3SL200H780C3N EP3SL200H780C4LN
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 最后采购期
库存状态 有库存 有库存
单价(USD) $4,995.00 $1,145.00
Family Stratix III L (low-power) —
Process Node 40 nm —
Logic Elements 200,000 200,000
Embedded Memory Bits 10,901,504 bits —
Logic Array Blocks (LABs) 8,000 8,000
User I/Os 488 488
封装 780-Ball FCBGA (HBGA), 29 x 29 mm 780-BBGA / HBGA / FCBGA
安装类型 Surface Mount Surface Mount
Maximum Internal Clock Frequency 800 MHz —
Transceivers 24 channels, up to 3.75 Gbps Multi-quad, up to 6.375 Gbps
DSP Blocks 384 —
Speed Grade C3 (commercial, -3 speed) 4 (commercial, slowest of grade 4)
工作温度 0C to +85C (commercial) 0 C to +70 C (commercial, 'C' grade)
Voltage - Core 0.9 V / 1.0 V (core, VCC) —
Voltage - I/O 1.2 V to 3.3 V (VCCIO banks) —
MSL 等级 3 —
Lead-Free / RoHS Yes —
Mounting Pitch 1.0 mm ball pitch —
PLLs 12 (Stratix III PLL array) 8
Configuration JTAG IEEE Std 1149.1, passive/active serial JTAG / Passive Serial / Fast Passive Parallel
Series — Stratix III L
Total Memory Bits — 10,901,504
引脚数 — 780
Core Supply Voltage — 0.86 V to 1.15 V
DSP Blocks (18x18 multipliers) — [DATA_NEEDED: exact multiplier count]
RoHS 状态 — Compliant
Lead-Free — Yes

数据手册与资源

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