EP3SL200H780C4LN vs EP3SL200H780C3N 对比
详细并排对比 EP3SL200H780C4LN 出自 Altera 和 EP3SL200H780C3N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP3SL200H780C4LN | EP3SL200H780C3N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $1,145.00 | $4,995.00 |
| Series | Stratix III L | — |
| Logic Elements | 200,000 | 200,000 |
| Logic Array Blocks (LABs) | 8,000 | 8,000 |
| User I/Os | 488 | 488 |
| Total Memory Bits | 10,901,504 | — |
| 引脚数 | 780 | — |
| 封装 | 780-BBGA / HBGA / FCBGA | 780-Ball FCBGA (HBGA), 29 x 29 mm |
| 安装类型 | Surface Mount | Surface Mount |
| Core Supply Voltage | 0.86 V to 1.15 V | — |
| 工作温度 | 0 C to +70 C (commercial, 'C' grade) | 0C to +85C (commercial) |
| Speed Grade | 4 (commercial, slowest of grade 4) | C3 (commercial, -3 speed) |
| Transceivers | Multi-quad, up to 6.375 Gbps | 24 channels, up to 3.75 Gbps |
| DSP Blocks (18x18 multipliers) | [DATA_NEEDED: exact multiplier count] | — |
| PLLs | 8 | 12 (Stratix III PLL array) |
| Configuration | JTAG / Passive Serial / Fast Passive Parallel | JTAG IEEE Std 1149.1, passive/active serial |
| RoHS 状态 | Compliant | — |
| Lead-Free | Yes | — |
| Family | — | Stratix III L (low-power) |
| Process Node | — | 40 nm |
| Embedded Memory Bits | — | 10,901,504 bits |
| Maximum Internal Clock Frequency | — | 800 MHz |
| DSP Blocks | — | 384 |
| Voltage - Core | — | 0.9 V / 1.0 V (core, VCC) |
| Voltage - I/O | — | 1.2 V to 3.3 V (VCCIO banks) |
| MSL 等级 | — | 3 |
| Lead-Free / RoHS | — | Yes |
| Mounting Pitch | — | 1.0 mm ball pitch |