EP3SL340F1517C3N vs EP3SL340F1517C3 对比

详细并排对比 EP3SL340F1517C3N 出自 Altera 和 EP3SL340F1517C3 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP3SL340F1517C3N EP3SL340F1517C3
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 有效
库存状态 有库存 有库存
单价(USD) $3,750.00 $0.00
Family Stratix III L —
Logic Elements 337,500 —
Logic Array Blocks (LABs) 13,500 —
Embedded Memory Bits 18,822,144 bits (18.8 Mbit) —
Maximum User I/O Pins 976 —
Process Technology 65 nm CMOS, low-power 65 nm
Core Voltage (VCCINT) 1.1 V —
Maximum Core Frequency 500 MHz —
Speed Grade -3 (fastest commercial) —
封装 1517-ball FC-BGA 1517-BBGA, FCBGA
Package Code F1517 —
工作温度 0 C to 85 C (commercial) [DATA_NEEDED: operating temperature range]
RoHS 状态 Compliant (lead-free ball metallurgy, N suffix) [DATA_NEEDED: RoHS status]
安装类型 Surface Mount (FC-BGA) —
MSL 等级 [DATA_NEEDED: MSL level] —
DSP Blocks [DATA_NEEDED: exact DSP block count] —
Transceivers [DATA_NEEDED: transceiver count for this package] —
PLLs [DATA_NEEDED: PLL count] —
Device Type — Field Programmable Gate Array (FPGA)
Series — Stratix III L
Logic Cells — 337,500
Logic Elements/Cells — 337,500
LABs — 13,500
User I/O — 976
Memory Bits — 18,822,144 bits
Maximum Reported Frequency — 500 MHz
Core Voltage — 1.1 V
Terminal Count — 1517 pins
Package Shape — Square
Terminal Form — Ball
AEC-Q100 Qualification — [DATA_NEEDED: AEC-Q100 qualification]

数据手册与资源

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