EP3SL50F484C3G vs EP3SL50F484C2G 对比

详细并排对比 EP3SL50F484C3G 出自 Intel 和 EP3SL50F484C2G 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP3SL50F484C3G EP3SL50F484C2G
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 有效
库存状态 有库存 有库存
单价(USD) $165.00 $335.00
Family Stratix III L Stratix III L
Logic Elements (LE) 47,500 —
Embedded Memory Bits 2,184,192 —
User I/O Pins 296 —
封装 484-FBGA (FCBGA), 23x23 mm 484-ball FCBGA (FBGA-484)
Process Node 40 nm —
DSP Blocks (18x18 multipliers) 384 —
Transceivers [DATA_NEEDED: number of embedded transceivers and max data rate] —
PLLs [DATA_NEEDED: PLL count] —
PCIe Hard IP [DATA_NEEDED: PCIe hard IP version] —
Operating Temperature Grade Commercial (C3 speed grade, 0C to 85C) —
Speed Grade C3 —
Supply Voltage Core [DATA_NEEDED: VCC/VCCINT nominal] —
安装类型 Surface Mount (BGA) —
MSL 等级 [DATA_NEEDED: MSL rating] —
RoHS 状态 Compliant Compliant
Lead-Free Yes —
无卤 [DATA_NEEDED: halogen-free status] —
Logic Elements — 47,500 LE
Adaptive Logic Modules (ALMs) — 19,000 ALM
Embedded Memory — 2,184,192 bits (2.08 Mbit)
Maximum User I/Os — 296 I/O
Number of LABs/CLBs — [DATA_NEEDED: LAB count]
Operating Supply Voltage (Core) — 1.1 V
Maximum Operating Temperature — +85 C
Minimum Operating Temperature — 0 C
最大时钟频率 — 600 MHz
Process Technology — 65 nm CMOS
安装方式 — SMD/SMT
Packaging — Tray
Total Transceivers — [DATA_NEEDED: transceiver count]
DSP Blocks — [DATA_NEEDED: DSP block count]

数据手册与资源

浏览全部产品 创建 BOM 获取报价