EP3SL50F484C4G vs EP3SL50F484C2G 对比

详细并排对比 EP3SL50F484C4G 出自 Altera 和 EP3SL50F484C2G 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP3SL50F484C4G EP3SL50F484C2G
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 有效
库存状态 有库存 有库存
单价(USD) $122.10 $335.00
Family Stratix III L Stratix III L
Logic Elements 47,500 LE 47,500 LE
Adaptive Logic Modules (ALMs) 19,000 ALM 19,000 ALM
Embedded Memory 2,184,192 bits (2.08 Mbit) 2,184,192 bits (2.08 Mbit)
User I/Os 296 I/O —
Process Technology 65 nm 65 nm CMOS
Operating Frequency up to 450 MHz (datasheet typical) —
Core Supply Voltage 1.1 V —
Speed Grade C4 —
封装 484-ball FC-FBGA (FineLine BGA) 484-ball FCBGA (FBGA-484)
安装类型 Surface Mount —
工作温度 0C to +85C (commercial) —
I/O Standards Supported LVDS, LVTTL, LVCMOS, SSTL, HSTL —
Design Tool Altera Quartus II / Intel Quartus Prime (legacy support) —
Lead-Free / RoHS Lead-free (suffix G); RoHS-compliant —
Maximum User I/Os — 296 I/O
Number of LABs/CLBs — [DATA_NEEDED: LAB count]
Operating Supply Voltage (Core) — 1.1 V
Maximum Operating Temperature — +85 C
Minimum Operating Temperature — 0 C
最大时钟频率 — 600 MHz
安装方式 — SMD/SMT
Packaging — Tray
RoHS 状态 — Compliant
Total Transceivers — [DATA_NEEDED: transceiver count]
DSP Blocks — [DATA_NEEDED: DSP block count]

数据手册与资源

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