EP3SL50F484I4G vs EP3SL50F484I4LG 对比

详细并排对比 EP3SL50F484I4G 出自 Intel 和 EP3SL50F484I4LG 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP3SL50F484I4G EP3SL50F484I4LG
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $165.00 $945.00
Family Stratix III L Stratix III L
Logic Elements 47,500 47,500
LABs/CLBs 1,900 —
Total Memory Bits 2,184,192 bits —
Number of I/O 296 user I/O —
Number of Logic Gates [DATA_NEEDED: total gate count] —
Core Voltage 1.1 V —
Process Technology 65 nm CMOS —
Maximum Internal Frequency 450 MHz —
工作温度 -40C to +100C (Industrial) -40C to +100C (Industrial)
封装 484-BBGA, FC-BGA (FineLine BGA) 23 x 23 mm 484-Ball FCBGA (FBGA)
安装类型 Surface Mount Surface Mount
RoHS 状态 Compliant Compliant
Supply Voltage Range [DATA_NEEDED: full supply tolerance band] —
Configuration Method SRAM-based, loaded via JTAG, Active Serial, or Active Parallel —
Series — EP3SL50
Embedded Memory — 2,184,192 bits (273 KB)
User I/Os — 296
Speed Grade — I4 (fast)
电源电压 — 0.85 V / 1.1 V / 1.2 V / 2.5 V / 3.3 V (multi-rail)
Process Node — 40 nm
Lead-Free — Yes
Total I/O Banks — [DATA_NEEDED: I/O bank count]
DSP Blocks — [DATA_NEEDED: DSP block count]
Transceivers — [DATA_NEEDED: transceiver channel count]
Configuration Memory — SRAM-based
Configuration Interface — JTAG / Passive Serial / Fast Passive Parallel

数据手册与资源

浏览全部产品 创建 BOM 获取报价