EP3SL50F484I4G vs EP3SL50F484I4LN 对比

详细并排对比 EP3SL50F484I4G 出自 Intel 和 EP3SL50F484I4LN 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP3SL50F484I4G EP3SL50F484I4LN
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $165.00 $0.00
Family Stratix III L —
Logic Elements 47,500 —
LABs/CLBs 1,900 —
Total Memory Bits 2,184,192 bits —
Number of I/O 296 user I/O —
Number of Logic Gates [DATA_NEEDED: total gate count] —
Core Voltage 1.1 V [DATA_NEEDED: core voltage]
Process Technology 65 nm CMOS CMOS
Maximum Internal Frequency 450 MHz —
工作温度 -40C to +100C (Industrial) —
封装 484-BBGA, FC-BGA (FineLine BGA) 23 x 23 mm 484-BBGA, FCBGA
安装类型 Surface Mount —
RoHS 状态 Compliant [DATA_NEEDED: RoHS status]
Supply Voltage Range [DATA_NEEDED: full supply tolerance band] —
Configuration Method SRAM-based, loaded via JTAG, Active Serial, or Active Parallel —
Product Type — Field Programmable Gate Array (FPGA)
Device Family — Stratix III L
Logic Cells — 47,500
Embedded Memory — 2,184,192 bits
User I/O — 296
Logic Array Blocks — 1,900 LABs
Listed Frequency — 717 MHz
Package Description — FBGA-484
Terminal Count — 484
Terminal Form — Ball
Package Body Material — Plastic/Epoxy
Lead-Free Status — Lead free
Operating Temperature Grade — Industrial
I/O Banks — [DATA_NEEDED: I/O bank count]
Transceiver Count — [DATA_NEEDED: transceiver count]
I/O Voltage — [DATA_NEEDED: I/O voltage]
Junction Temperature — [DATA_NEEDED: junction temperature]
REACH Status — [DATA_NEEDED: REACH status]
AEC-Q100 Qualification — [DATA_NEEDED: AEC-Q100 qualification]

数据手册与资源

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