EP3SL50F484I4L vs EP3SL50F484I4LN 对比
详细并排对比 EP3SL50F484I4L 出自 Intel 和 EP3SL50F484I4LN 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP3SL50F484I4L | EP3SL50F484I4LN |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $658.26 | $0.00 |
| Series | Stratix III L (Low Power) | — |
| Family | Stratix III | — |
| Logic Elements (LE) | 47,500 | — |
| Embedded Memory Bits | 2,184,192 bits (~273 KB) | — |
| User I/O Pins | 296 | — |
| 封装 | 484-ball FBGA (FCBGA) | 484-BBGA, FCBGA |
| Speed Grade | 4 | — |
| 工作温度 | 0 °C to 85 °C (commercial, per DigiKey listing) | — |
| 电源电压 | 0.9 V core (family-typical) | — |
| Process Technology | 65 nm low-power CMOS | CMOS |
| 安装类型 | Surface Mount | — |
| Lead-Free / RoHS | Yes (RoHS compliant) | — |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG | — |
| Transceivers | Family supports up to 4 transceivers per family datasheet | — |
| DSP Blocks | Family supports up to 384 18x18 multipliers (family-level) | — |
| Product Type | — | Field Programmable Gate Array (FPGA) |
| Device Family | — | Stratix III L |
| Logic Cells | — | 47,500 |
| Embedded Memory | — | 2,184,192 bits |
| User I/O | — | 296 |
| Logic Array Blocks | — | 1,900 LABs |
| Listed Frequency | — | 717 MHz |
| Package Description | — | FBGA-484 |
| Terminal Count | — | 484 |
| Terminal Form | — | Ball |
| Package Body Material | — | Plastic/Epoxy |
| Lead-Free Status | — | Lead free |
| Operating Temperature Grade | — | Industrial |
| I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Transceiver Count | — | [DATA_NEEDED: transceiver count] |
| Core Voltage | — | [DATA_NEEDED: core voltage] |
| I/O Voltage | — | [DATA_NEEDED: I/O voltage] |
| Junction Temperature | — | [DATA_NEEDED: junction temperature] |
| RoHS 状态 | — | [DATA_NEEDED: RoHS status] |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |