EP3SL50F780I3N vs EP3SL50F780I3 对比
详细并排对比 EP3SL50F780I3N 出自 Altera 和 EP3SL50F780I3 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP3SL50F780I3N | EP3SL50F780I3 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $385.00 | $632.63 |
| Manufacturer | Altera (Intel Programmable Solutions Group) | — |
| Series | Stratix III L | Stratix III L |
| Logic Elements | 47,500 | 47,500 |
| Number of LABs | 1,900 | — |
| Embedded Memory Bits | 2,184,192 bits | — |
| Maximum User I/O | 488 | — |
| Operating Frequency (max) | 500 MHz | — |
| Process Technology | 65 nm CMOS | 65 nm |
| Core Supply Voltage | 1.1 V | — |
| Speed Grade | -3 | I3 (industrial, third-fastest bin) |
| 封装 | 780-ball FC-FBGA (Flip-Chip BGA) | 780-ball FC-FBGA (FineLine BGA), 1 mm pitch |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度 | -40C to +100C (industrial) | -40C to +100C (industrial) |
| JTAG Support | IEEE Std 1149.1 Boundary-Scan | — |
| RoHS 状态 | Compliant (LEAD FREE) | Compliant |
| Configuration Method | JTAG / Serial / Passive / Active | — |
| Logic Array Blocks (LABs) | — | 1,900 |
| User I/O Pins | — | 488 |
| Total Memory Bits | — | 2,106 Kbit (M9K + M144K) |
| Transceiver Channels | — | 16 (up to 3.75 Gbps) + 8 (up to 6.5 Gbps) |
| Core Voltage | — | Selectable 1.1 V / 0.9 V |
| Lead Free | — | Yes |
| Vertical Migration | — | Drop-in to EP3SL70 in 780-FBGA package |