EP3SL50F780I3N vs EP3SL50F780I3G 对比

详细并排对比 EP3SL50F780I3N 出自 Altera 和 EP3SL50F780I3G 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP3SL50F780I3N EP3SL50F780I3N - Stratix III L FPGA, 47.5K LE, FBGA-780 | Intel

EP3SL50F780I3N - Stratix III L FPGA, 47.5K LE, FBGA-780 | Intel

EP3SL50F780I3N ⚠ 最后一次采购
Intel
EP3SL50F780I3G EP3SL50F780I3G - Stratix III L FPGA, 47.5K LE, 780-BGA | Intel

EP3SL50F780I3G - Stratix III L FPGA, 47.5K LE, 780-BGA | Intel

EP3SL50F780I3G ⚠ 最后一次采购

规格对比

参数 EP3SL50F780I3N EP3SL50F780I3G
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 最后采购期
库存状态 有库存 有库存
单价(USD) $385.00 $295.00
Manufacturer Altera (Intel Programmable Solutions Group) —
Series Stratix III L —
Logic Elements 47,500 47,500 LE
Number of LABs 1,900 —
Embedded Memory Bits 2,184,192 bits —
Maximum User I/O 488 —
Operating Frequency (max) 500 MHz —
Process Technology 65 nm CMOS 65 nm CMOS
Core Supply Voltage 1.1 V —
Speed Grade -3 I3 (industrial)
封装 780-ball FC-FBGA (Flip-Chip BGA) 780-ball FCBGA (F780)
安装类型 Surface Mount Surface Mount (SMD/SMT)
工作温度 -40C to +100C (industrial) -40C to +100C
JTAG Support IEEE Std 1149.1 Boundary-Scan —
RoHS 状态 Compliant (LEAD FREE) Compliant
Configuration Method JTAG / Serial / Passive / Active —
Family — Stratix III L
Adaptive Logic Modules (ALMs) — 19,000 ALM
Embedded Memory — 2.08 Mbit
Total Memory Bits — 2,184,192 bit
User I/Os — 488 I/O
Operating Supply Voltage (Core) — 1.1 V
Lead-Free — Yes
MSL 等级 — 3 (per JEDEC J-STD-020)

数据手册与资源

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