EP3SL70F484I3G vs EP3SL70F484C4G 对比

详细并排对比 EP3SL70F484I3G 出自 Altera 和 EP3SL70F484C4G 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP3SL70F484I3G EP3SL70F484C4G
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $305.00 $1,485.00
Series Stratix III L Stratix III
Family Stratix III (low-power variant) Stratix III L
Logic Elements (LE) 67,500 67,500
ALMs (Adaptive Logic Modules) [DATA_NEEDED: ALM count] —
Total Memory Bits 2,699,264 —
DSP Blocks [DATA_NEEDED: DSP block count] —
User I/O Pins 296 —
Transceivers 24 —
Maximum Transceiver Data Rate [DATA_NEEDED: max transceiver Gbps] —
Package Type 484-ball FCBGA (Fine-pitch Chip-Scale BGA) —
Package Pin Count 484 —
Speed Grade I3 C4 (medium)
工作温度范围 -40C to +100C (Industrial) —
Core Voltage 1.0 V —
Process Technology 40 nm TSMC —
安装类型 Surface Mount —
MSL 等级 [DATA_NEEDED: MSL level] —
RoHS 状态 Compliant Compliant (lead-free, 'G' suffix)
Configuration Interface JTAG / Serial Passive / Active Serial —
Adaptive Logic Modules (ALM) — 27,000
Embedded Memory — 2,699,264 bits (2.57 Mbit)
User I/Os — 296
Operating Supply Voltage (Core) — 1.1 V
工作温度 — 0C to +85C
安装方式 — SMD/SMT
封装 — 484-ball FCBGA (FineLine BGA)
Configuration Mode — JTAG / Passive Serial / Fast Passive Parallel
Process Node — 40 nm (TSMC)
Family Introduction Year — [DATA_NEEDED: year]

数据手册与资源

浏览全部产品 创建 BOM 获取报价