EP610DC-15 vs EP610DI-30 对比
详细并排对比 EP610DC-15 出自 Altera 和 EP610DI-30 出自 Rochester Electronics。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Rochester Electronics
EP610DI-30 - 16-Macrocell Classic EPLD, 30ns, CERDIP-24 | Rochester Electronics
EP610DI-30 ✓ 量产中规格对比
| 参数 | EP610DC-15 | EP610DI-30 |
|---|---|---|
| 品牌 | Altera | Rochester Electronics |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $7.95 | $23.50 |
| Product Family | Classic EPLD (EP610) | — |
| Architecture | UV-erasable CMOS PAL-type | — |
| Macrocells | 16 | 16 |
| Logic Expanders | 4 | — |
| Dedicated Inputs | 20 | — |
| Bidirectional I/O Pins | 16 | — |
| Total Product Terms | 160 | — |
| Propagation Delay (tPD) | 15 ns (speed grade -15) | 30 ns |
| Maximum Internal Clock Frequency | 71.4 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| 工作温度 | 0C to 70C (commercial) | [DATA_NEEDED: operating temperature range] |
| 封装 | 24-pin Ceramic DIP (CDIP-24) with UV window | CERDIP-24 (windowed, UV-erasable) |
| 安装类型 | Through-Hole | Through-Hole |
| Programming Method | JEDEC fuse map, UV erasure | — |
| Technology | CMOS | CMOS |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | unknown |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Family | — | Classic EP610 |
| Pipelined Data Rate | — | 100 MHz |
| 电源电压 | — | 5 V (single supply) |
| Programmable Elements | — | EPROM (UV-erasable, windowed) |
| I/O Pins | — | [DATA_NEEDED: I/O pin count] |
| Logic Capacity | — | [DATA_NEEDED: usable gates / logic capacity] |
| Lead-Free | — | unknown |
| Original Manufacturer | — | Altera (now Intel) |
| Current Supplier | — | Rochester Electronics (authorized continuing source) |
| MSL 等级 | — | N/A (through-hole, non-surface-mount) |