EP610LI-25 vs EP610DC-25 对比

详细并排对比 EP610LI-25 出自 Rochester Electronics 和 EP610DC-25 出自 Rochester Electronics。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Rochester Electronics
EP610DC-25 EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester

EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester

EP610DC-25 ✓ 量产中

规格对比

参数 EP610LI-25 EP610DC-25
品牌 Rochester Electronics Rochester Electronics
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $17.25 $9.95
Product Type EPLD (Erasable Programmable Logic Device) EPLD (Erasable Programmable Logic Device)
Family Altera Classic EP610 Altera Classic EPLD
Macrocells 16 16
Usable Gates 300 —
Maximum Propagation Delay (tPD) 25 ns 25 ns
Pipelined Data Rate (fMAX) 100 MHz —
Speed Grade 25 (25 ns tPD) —
Power Variant L (low-power CMOS) —
Temperature Grade I (industrial) —
Dedicated Inputs 4 —
I/O Pins 16 —
Technology CMOS, UV-erasable (windowed) CMOS EPROM (UV-erasable)
封装 Ceramic DIP-24 (windowed, Altera 'I' designation) 24-pin CDIP (Ceramic DIP, through-hole)
安装类型 Through-hole Through Hole
Programming Method Altera MAX+PLUS II / Classic compiler + compatible programmer JEDEC fuse-map / UV-erase
RoHS 状态 Unknown - ceramic DIP legacy package —
Manufacturer / Source Altera (original), Rochester Electronics (authorized continuing supplier) —
Equivalent Gates — 300
Pipelined Data Rate — Up to 100 MHz
Number of I/O Pins — 22
Number of Dedicated Inputs — 4
Total Pin Count — 24
Supply Voltage (VCC) — 4.75 V to 5.25 V (5 V nominal)
工作温度 — 0 C to +70 C
Speed Grade Suffix — -25 (25 ns tPD)

数据手册与资源

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