EP610LI-30 vs EP610JI-30 对比

详细并排对比 EP610LI-30 出自 Rochester Electronics 和 EP610JI-30 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Rochester Electronics
EP610LI-30 EP610LI-30 - 16-Macrocell Classic EPLD, 30ns | Rochester

EP610LI-30 - 16-Macrocell Classic EPLD, 30ns | Rochester

EP610LI-30 ✓ 量产中

规格对比

参数 EP610LI-30 EP610JI-30
品牌 Rochester Electronics Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 不推荐新设计
库存状态 有库存 有库存
单价(USD) $18.50 $9.40
Product Type EPLD (Erasable Programmable Logic Device) —
Family Classic EPLD (MAX architecture) Altera Classic EPLD (EP610)
Macrocells 16 16
Pin-to-Pin Delay (tPD) 30 ns —
Maximum Internal Frequency (fMAX) 100 MHz (pipelined) —
AND Array 24V16 —
Process Technology CMOS, UV-erasable EPROM cells CMOS
Supply Voltage (VCC) 5 V (TTL-compatible I/O) —
封装 24-pin Ceramic DIP (windowed, CDIP) CQCC28 (windowed ceramic JLCC, J-bend)
工作温度 -55C to +125C (military/extended) -40C to +85C (industrial, per EP610 family suffix convention)
Output Polarity User-configurable per macrocell —
Flip-Flop per Cell D / T / J-K configurable —
Programming Method UV erase + Classic-series PLD programmer —
RoHS 状态 unknown [DATA_NEEDED: RoHS status - vintage ceramic package, likely non-RoHS]
Manufacturer Rochester Electronics (originally Altera) —
Device Type — UV Erasable Programmable Logic Device (EPLD)
Propagation Delay (tpd) — 30 ns (max)
Pipelined Data Rate — Up to 100 MHz
Product Terms — 160
Dedicated Inputs — 4
I/O Pins — 16
External Clocks — 2
电源电压 — 5 V (single supply)
Package Code — JLCC-28 / CQCC28
Erasure Method — Ultraviolet (UV) via top window
Programming — Altera Logic Programmer compatible
安装类型 — Surface Mount (JLCC)
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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