EP610LI-35 vs EP610LI-30 对比

详细并排对比 EP610LI-35 出自 Altera 和 EP610LI-30 出自 Rochester Electronics。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Rochester Electronics
EP610LI-30 EP610LI-30 - 16-Macrocell Classic EPLD, 30ns | Rochester

EP610LI-30 - 16-Macrocell Classic EPLD, 30ns | Rochester

EP610LI-30 ✓ 量产中

规格对比

参数 EP610LI-35 EP610LI-30
品牌 Altera Rochester Electronics
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 有效
库存状态 有库存 有库存
单价(USD) $10.50 $18.50
Family Classic EPLD Classic EPLD (MAX architecture)
Series EP610 —
Number of Macrocells 16 —
Usable Gates 300 —
Number of I/O Pins 16 —
Total Inputs 20 —
Dedicated Inputs 4 —
External Clock Inputs 2 —
Product Terms 160 —
Maximum Propagation Delay 35 ns (tpd) —
Maximum Operating Frequency 28.6 MHz (fmax) —
Pipelined Data Rate Up to 100 MHz —
电源电压 5 V —
Process Technology CMOS CMOS, UV-erasable EPROM cells
Architecture PAL-type (AND-OR array) —
封装 28-pin PLCC (windowed ceramic, 'LI') 24-pin Ceramic DIP (windowed, CDIP)
工作温度范围 [DATA_NEEDED: military/industrial operating temperature range] —
Programming Technology UV-erasable (EPROM) —
安装类型 Surface Mount —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] unknown
Product Type — EPLD (Erasable Programmable Logic Device)
Macrocells — 16
Pin-to-Pin Delay (tPD) — 30 ns
Maximum Internal Frequency (fMAX) — 100 MHz (pipelined)
AND Array — 24V16
Supply Voltage (VCC) — 5 V (TTL-compatible I/O)
工作温度 — -55C to +125C (military/extended)
Output Polarity — User-configurable per macrocell
Flip-Flop per Cell — D / T / J-K configurable
Programming Method — UV erase + Classic-series PLD programmer
Manufacturer — Rochester Electronics (originally Altera)

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