EP610PC-20 vs EP610PC30 对比
详细并排对比 EP610PC-20 出自 Altera 和 EP610PC30 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP610PC-20 | EP610PC30 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $47.80 | $42.00 |
| Family | Classic EPLD | Classic EP610 |
| Logic Elements | 16 macrocells | — |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 20 ns | 30 ns |
| Maximum Operating Frequency | 100 MHz (pipelined) | — |
| Supply Voltage (VCC) | 5 V ±10% | 5 V |
| 引脚数 | 24 | — |
| 封装 | PDIP-24 | PDIP-24 |
| 工作温度 | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Process Technology | CMOS EPROM | — |
| Programmable Flip-Flops | 16 | — |
| Input Pins | 24 | — |
| Output Pins | 16 | — |
| I/O Compatibility | TTL | — |
| Program/Erase Method | UV (windowed) or OTP | — |
| RoHS 状态 | Non-compliant (legacy PDIP) | Not applicable (legacy through-hole, contains Pb per historical datasheet) |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocells | — | 16 |
| Maximum Toggle Frequency | — | 33.3 MHz |
| Pipelined Data Rate | — | Up to 100 MHz |
| Technology | — | CMOS |
| 安装类型 | — | Through-Hole |
| Programming | — | EPROM/EEPROM-based, MAX+plus II toolchain |
| Logic Capacity | — | 16 macrocells / 300 gates equivalent |
| Configuration Memory | — | Non-volatile (UV-erasable or OTP variant) |
| Manufacturer (Original) | — | Altera Corporation (now Intel FPGA) |
| Current Distributor | — | Rochester Electronics, LLC |