EP910DC-15 vs EP910DI-30 对比
详细并排对比 EP910DC-15 出自 Altera 和 EP910DI-30 出自 Rochester Electronics。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Rochester Electronics
EP910DI-30 - 24-Macrocell EPLD, 30ns, CDIP-40 | Altera (Rochester)
EP910DI-30 Nrnd规格对比
| 参数 | EP910DC-15 | EP910DI-30 |
|---|---|---|
| 品牌 | Altera | Rochester Electronics |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $10.75 | $17.60 |
| Family | Altera Classic EPLD | Classic EPLD (Altera EP910 series) |
| Device Density | 900 usable gates | — |
| Macrocells | 24 | — |
| Logic Elements | [DATA_NEEDED: exact LE count] | — |
| Dedicated Inputs | 12 | 10 |
| Bidirectional I/O Pins | 12 | — |
| Flip-Flops | 10 | — |
| Product Terms per Macrocells | 24 | — |
| Maximum Propagation Delay (tPD) | 15 ns | — |
| Speed Grade | 15 | — |
| Supply Voltage (VCC) | 5 V (typical) | 5 V (single supply) |
| 工作温度 | 0C to +70C (commercial) | -40C to +85C (industrial) |
| Technology | CMOS EPROM, UV-erasable | CMOS, UV-erasable EPROM |
| 封装 | 24-pin ceramic DIP (DC) | CDIP-40 (ceramic DIP, 40-pin with UV window) |
| 安装类型 | Through-Hole | Through-Hole (DIP) |
| MSL 等级 | [DATA_NEEDED: MSL level] | — |
| RoHS 状态 | [DATA_NEEDED: not explicitly stated in verified data] | [DATA_NEEDED: RoHS compliance status] |
| Product Type | — | UV-Erasable Programmable Logic Device (EPLD) |
| Macrocell Count | — | 24 |
| Propagation Delay (tpd) | — | 30 ns |
| Maximum Toggle Frequency (fmax) | — | 62 MHz |
| Dedicated I/O Pins | — | 12 (12 input + 12 output) |
| Output Enable Pins | — | 2 |
| 引脚数量 | — | 40 |
| Programmable Logic Element | — | JEDEC fuse map (3rd-party programmer) |
| Manufacturer (Original) | — | Altera (now Intel PSG) |
| Current Distributor / Authorized Aftermarket | — | Rochester Electronics, LLC |