EP910DI-30 vs EP910DM883B 对比
详细并排对比 EP910DI-30 出自 Rochester Electronics 和 EP910DM883B 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Rochester Electronics
EP910DI-30 - 24-Macrocell EPLD, 30ns, CDIP-40 | Altera (Rochester)
EP910DI-30 Nrnd规格对比
| 参数 | EP910DI-30 | EP910DM883B |
|---|---|---|
| 品牌 | Rochester Electronics | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $17.60 | $7.10 |
| Product Type | UV-Erasable Programmable Logic Device (EPLD) | — |
| Family | Classic EPLD (Altera EP910 series) | Classic EPLD - EP910 Series |
| Macrocell Count | 24 | — |
| Propagation Delay (tpd) | 30 ns | — |
| Maximum Toggle Frequency (fmax) | 62 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V |
| Technology | CMOS, UV-erasable EPROM | — |
| 封装 | CDIP-40 (ceramic DIP, 40-pin with UV window) | CDIP-40 (Ceramic DIP, 40-pin) |
| 安装类型 | Through-Hole (DIP) | Through-Hole (DIP) |
| Dedicated Inputs | 10 | — |
| Dedicated I/O Pins | 12 (12 input + 12 output) | — |
| Output Enable Pins | 2 | — |
| 引脚数量 | 40 | — |
| Programmable Logic Element | JEDEC fuse map (3rd-party programmer) | — |
| 工作温度 | -40C to +85C (industrial) | -55 °C to +125 °C (military) |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Manufacturer (Original) | Altera (now Intel PSG) | — |
| Current Distributor / Authorized Aftermarket | Rochester Electronics, LLC | — |
| Manufacturer | — | Altera (now part of Intel) |
| Device Type | — | Erasable Programmable Logic Device (EPLD) |
| Architecture | — | PAL-type AND-OR-NOT, CMOS |
| Macrocells | — | 24 |
| Inputs | — | 36 |
| Outputs | — | 24 |
| Product Terms | — | 240 |
| Propagation Delay (tPD) | — | 40 ns (typical) |
| 最大时钟频率 | — | 25 MHz |
| Programming Voltage (VPP) | — | 12.5 V (UV-erase window) |
| MIL Processing | — | MIL-STD-883B Class B |
| Configuration Memory | — | UV-erasable EPROM |
| Logic Elements | — | Combinational + Registered |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |