EP910JM-40 vs EP910ILC-50 对比
详细并排对比 EP910JM-40 出自 Altera 和 EP910ILC-50 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP910JM-40 | EP910ILC-50 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.95 | $10.85 |
| Device Family | Altera Classic EPLD | — |
| Series | EP910 | — |
| Logic Type | EPLD (UV-Erasable PAL-type) | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | — |
| I/O Lines | 24 | — |
| Total Inputs (max) | 36 | — |
| Total Outputs (max) | 24 | — |
| Product Terms | 240 | — |
| External Clock Inputs | 2 | — |
| Propagation Delay (tPD) | 40 ns | — |
| Process Technology | CMOS | — |
| 封装 | JLCC-28 (windowed ceramic, J-lead) | PLCC-44 (J-lead) |
| 安装类型 | Surface Mount | Surface Mount (socket-compatible) |
| RoHS 状态 | [DATA_NEEDED: RoHS status - UV-windowed ceramic package typically not RoHS compliant] | [DATA_NEEDED: RoHS compliance status] |
| Programming Method | UV erase + EPROM programmer | — |
| 工作温度 | 0C to +70C (commercial) [DATA_NEEDED: confirm grade] | 0C to +70C (commercial) |
| Family | — | Altera Classic EPLD |
| Usable Gates | — | 900 (typical) |
| Maximum Frequency | — | [DATA_NEEDED: fMAX value from datasheet] |
| Pin-to-Pin Delay (tpd) | — | 50 ns |
| Supply Voltage (VCC) | — | 5 V (typical) |
| User I/O Pins | — | 24 |
| Dedicated Input Pins | — | 12 |
| Technology | — | CMOS EPROM, UV-erasable |
| Programming Cycles | — | 100 (minimum) |
| Boundary Scan | — | IEEE 1149.1 JTAG (selected speed grades) |