EP910LC-35T vs EP910LC-32 对比

详细并排对比 EP910LC-35T 出自 Altera 和 EP910LC-32 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP910LC-35T EP910LC-32
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $28.90 $9.85
Family Classic EPLD (EP910) —
Logic Capacity 450 usable gates —
Macrocells 24 —
Propagation Delay (tPD) 35 ns —
Maximum Operating Frequency 28.6 MHz —
Supply Voltage (VCC) 5 V 5 V
User I/O Pins 36 —
封装 PLCC-44 (J-lead) PLCC-32
Process Technology CMOS (EPROM-based) —
工作温度 0C to +70C (commercial) —
Erasure Method UV-erasable window (ceramic package) / OTP (plastic) —
Programming Altera programming hardware + MAX+PLUS II —
安装类型 Surface Mount (PLCC socket or solder) Surface Mount (PLCC socket or direct solder)
MSL 等级 MSL 3 (168 hours) unknown
RoHS 状态 [DATA_NEEDED: RoHS status not in verified data] unknown
Device Family — Altera Classic EPLD
Number of Macrocells — 24
Number of Usable Gates — 900 gates (typical)
Number of Dedicated Inputs — 10
Number of I/O Pins — 20
Speed Grade — -32
Maximum Toggle Frequency (fMAX) — [DATA_NEEDED: fMAX value in MHz for -32 grade]
Pin-to-Pin Propagation Delay (tPD) — [DATA_NEEDED: tPD in ns for -32 grade]
Logic Family — Low-power CMOS (LC suffix)
Programming Method — UV-erasable or one-time programmable (OTP for LC windowless variant)
工作温度范围 — [DATA_NEEDED: commercial or industrial grade]
I/O Standard — TTL-compatible

数据手册与资源

浏览全部产品 创建 BOM 获取报价