EP910LC44-40 vs EP910LI44 对比

详细并排对比 EP910LC44-40 出自 Altera 和 EP910LI44 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP910LC44-40 EP910LI44
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.75 $8.20
Family Altera Classic EPLD Classic EPLD
Macrocells 24 24
Product Terms (Total) 240 —
I/O Pins 24 (bidirectional) —
Dedicated Inputs 12 12
Total Inputs 36 —
Global Clock Inputs 2 —
Propagation Delay (tPD) 40 ns —
Supply Voltage (VCC) 5 V (nominal) 4.75 V to 5.25 V (commercial), 4.5 V to 5.5 V (industrial)
Technology CMOS, UV-erasable EPROM CMOS
Logic Compatibility TTL-compatible I/O —
封装 44-pin PLCC (Plastic Leaded Chip Carrier) —
工作温度 0C to +70C (commercial) —
Programming Method JEDEC file via LP6/MP9 or compatible programmer Altera Logic Programmer card / Data I/O / third-party EPROM programmers
安装类型 Surface Mount Surface Mount (PLCC socket compatible)
RoHS 状态 [DATA_NEEDED: RoHS compliance] non-compliant (original PLCC-44 lead finish)
Architecture — PAL-type, CMOS, One-Time-Programmable
Package Type — PLCC-44 (J-lead, surface mount)
Total Pins — 44
Bidirectional I/O — 24
Maximum Logic Inputs — 36
Maximum Outputs — 24
Flip-Flops — 24
External Clocks — 2
Maximum Propagation Delay — [DATA_NEEDED: tpd for unmarked speed grade; speed-grade suffix encodes value: -15 = 15 ns, -20 = 20 ns, -25 = 25 ns, -30 = 30 ns, -35 = 35 ns, -40 = 40 ns, -45 = 45 ns, -50 = 50 ns]
Operating Temperature (L grade) — -40 °C to +85 °C (industrial)
Programmability — UV-erasable (windowed) or OTP

数据手册与资源

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