EP910LI-20 vs EP910IPC-50 对比

详细并排对比 EP910LI-20 出自 Altera 和 EP910IPC-50 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP910LI-20 EP910IPC-50
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $19.95 $13.85
Family Altera Classic EPLD Altera Classic EPLD
Macrocells 24 —
Maximum Operating Frequency 62 MHz —
Propagation Delay (tpd) 20 ns —
Dedicated Inputs 16 —
I/O Pins 24 —
Supply Voltage (VCC) 5 V 4.75 V to 5.25 V (5 V nominal)
工作温度 -40C to +85C (Industrial) -40C to +85C (industrial)
封装 40-pin Ceramic DIP (Windowed) 40-pin Ceramic DIP (IPC, windowed)
Technology CMOS, UV-erasable CMOS EPROM cell
Package Type Through-Hole, Ceramic DIP with Quartz Window —
Temperature Grade Industrial (-40C to +85C) —
引脚数量 40 —
Logic Family EPLD (Erasable PLD) —
Architecture Sum-of-products macrocell —
Pin/Package Compatibility Pin-compatible across EP910 family —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: not stated in verified data]
Product Type — Erasable Programmable Logic Device (EPLD)
Logic Capacity — [DATA_NEEDED: macrocell count / equivalent gates]
Propagation Delay (tPD) — 50 ns
Clock-to-Output (tCO) — 35 ns
Maximum Toggle Frequency — [DATA_NEEDED: fMAX]
User I/O Pins — 24
Programming Method — Off-board EPROM programmer + UV erase
Erasure Method — UV light through ceramic window (IPC package)
安装类型 — Through-Hole (DIP)

数据手册与资源

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