EP910PC-0 vs EP910PC-20T 对比
详细并排对比 EP910PC-0 出自 Altera 和 EP910PC-20T 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP910PC-0 | EP910PC-20T |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Unknown |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $8.70 | $8.70 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EPLD | Classic EPLD |
| Usable Gates | 900 gates | — |
| Macrocells | 24 | — |
| Logic Blocks | 6 (4 macrocells each) | — |
| Dedicated Inputs | 10 | — |
| I/O Pins | 24 | — |
| 封装 | PDIP-40 (Plastic DIP, 40-pin) | — |
| Speed Grade | -0 (slowest) | 20 ns |
| 电源电压 | 5 V (single supply) | [DATA_NEEDED: operating supply voltage] |
| Process Technology | CMOS | — |
| Logic Compatibility | 100% TTL emulation | — |
| 工作温度 | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Programming Method | UV-erasable / OTP | — |
| 安装类型 | Through-Hole (DIP) | — |
| Device Type | — | EPLD |
| Fabrication Technology | — | CMOS |
| Logic Integration | — | 300 to 900 usable gates |
| Logic Emulation | — | 100% TTL emulation |
| Application Function | — | High-speed, low-power logic integration |
| Programmable Device Class | — | Erasable programmable logic device |
| Device Family | — | Altera Classic EPLD Family |
| Package Code | — | PC |
| Package Pin Count | — | [DATA_NEEDED: package pin count] |
| Package Dimensions | — | [DATA_NEEDED: package dimensions] |
| I/O Count | — | [DATA_NEEDED: I/O count] |
| Internal Logic Capacity | — | 300 to 900 usable gates |
| Supported Logic Integration | — | Multiple PAL- and GAL-type devices |
| Programming Interface | — | [DATA_NEEDED: programming interface] |
| Programming Voltage | — | [DATA_NEEDED: programming voltage] |
| Mounting Technology | — | [DATA_NEEDED: mounting technology] |
| RoHS 状态 | — | unknown |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | not_applicable |
| Lead-Free Status | — | unknown |
| Halogen-Free Status | — | unknown |