EP910PC-15 vs EP910IDC-15 对比
详细并排对比 EP910PC-15 出自 Altera 和 EP910IDC-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP910PC-15 | EP910IDC-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $12.80 | $9.95 |
| Family | Altera Classic EPLD | Classic EPLD |
| Usable Gates | 900 | — |
| Macrocells | 24 | 24 |
| Maximum Pin-to-Pin Delay (tpd) | 15 ns | — |
| Counter Frequency (fCNT) | 100 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V |
| Supply Current (Icc) | 80 mA typical | — |
| Dedicated Inputs | 10 | 10 |
| Dedicated I/O Pins | 12 | — |
| 工作温度 | 0C to +70C (commercial) | — |
| 封装 | 24-pin PDIP (PDIP-24, 0.300 inch) | 40-pin CDIP (Ceramic DIP, through-hole) |
| 安装类型 | Through-Hole | — |
| Process Technology | CMOS, UV-erasable | — |
| Programming Method | Altera Logic Programmer card | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS] | non_compliant (ceramic DIP contains lead) |
| MSL 等级 | Not applicable (through-hole) | — |
| Manufacturer | — | Altera (now Intel PSG) |
| Equivalent Gates | — | 450 |
| Flip-Flops | — | 48 |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Maximum Frequency (fCNT) | — | 66.6 MHz |
| Terminal Count | — | 40 |
| Terminal Form | — | Through-Hole |
| Temperature Grade | — | Commercial (0C to +70C) |
| Programmable Security Bit | — | Yes |
| On-board Test Circuitry | — | Yes |
| Logic Type | — | UV Erasable EPROM-based |
| I/O Pins | — | 24 |
| Programming Technology | — | EPROM (UV-erasable) |