EP910PC-15 vs EP910PC-20T 对比

详细并排对比 EP910PC-15 出自 Altera 和 EP910PC-20T 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP910PC-15 EP910PC-20T
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Unknown
库存状态 有库存 有库存
单价(USD) $12.80 $8.70
Family Altera Classic EPLD Classic EPLD
Usable Gates 900 —
Macrocells 24 —
Maximum Pin-to-Pin Delay (tpd) 15 ns —
Counter Frequency (fCNT) 100 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) —
Supply Current (Icc) 80 mA typical —
Dedicated Inputs 10 —
Dedicated I/O Pins 12 —
工作温度 0C to +70C (commercial) [DATA_NEEDED: operating temperature range]
封装 24-pin PDIP (PDIP-24, 0.300 inch) —
安装类型 Through-Hole —
Process Technology CMOS, UV-erasable —
Programming Method Altera Logic Programmer card —
RoHS 状态 [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS] unknown
MSL 等级 Not applicable (through-hole) —
Device Type — EPLD
Fabrication Technology — CMOS
Logic Integration — 300 to 900 usable gates
Logic Emulation — 100% TTL emulation
Application Function — High-speed, low-power logic integration
Programmable Device Class — Erasable programmable logic device
Device Family — Altera Classic EPLD Family
Speed Grade — 20 ns
Package Code — PC
Package Pin Count — [DATA_NEEDED: package pin count]
Package Dimensions — [DATA_NEEDED: package dimensions]
电源电压 — [DATA_NEEDED: operating supply voltage]
I/O Count — [DATA_NEEDED: I/O count]
Internal Logic Capacity — 300 to 900 usable gates
Supported Logic Integration — Multiple PAL- and GAL-type devices
Programming Interface — [DATA_NEEDED: programming interface]
Programming Voltage — [DATA_NEEDED: programming voltage]
Mounting Technology — [DATA_NEEDED: mounting technology]
REACH Status — unknown
AEC-Q100 Qualification — not_applicable
Lead-Free Status — unknown
Halogen-Free Status — unknown

数据手册与资源

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