EP910PC-20 vs EP910PI-40 对比
详细并排对比 EP910PC-20 出自 Altera 和 EP910PI-40 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP910PC-20 | EP910PI-40 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $12.40 | $9.85 |
| Family | Altera Classic EPLD | — |
| Device | EP910 | — |
| Usable Gates | 900 | — |
| Macrocell Count | [DATA_NEEDED: macrocell count] | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| 封装 | PDIP-24 (PC suffix) | PDIP-40 (Plastic DIP, 40-pin) |
| 引脚数量 | 24 | — |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V (5 V nominal) |
| Technology | CMOS EPROM (UV-erasable) | — |
| I/O Compatibility | 100% TTL | — |
| 工作温度 | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programming Method | EPROM programmer, JEDEC fuse map | UV-erase + Altera programmer (legacy) |
| 安装类型 | Through-Hole (DIP) | Through-Hole |
| MSL 等级 | [DATA_NEEDED: MSL level] | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Device Family | — | Classic EPLD |
| Part Number | — | EP910PI-40 |
| Architecture | — | PAL-type macrocell, CMOS, UV-erasable |
| Number of Macrocells | — | 24 |
| Number of Dedicated Inputs | — | 12 |
| Number of I/O Lines | — | 24 |
| External Clock Inputs | — | 2 |
| 最大时钟频率 | — | 25 MHz |
| Propagation Delay (tPD) | — | 43 ns |
| Speed Grade | — | -40 (43 ns) |
| Process Technology | — | CMOS (UV-erasable) |
| Programmable Polarity | — | Yes (user-configurable output) |
| Output Enable Control | — | Yes (per-pin three-state) |