EP910PI-20 vs EP910PI-25T 对比

详细并排对比 EP910PI-20 出自 Altera 和 EP910PI-25T 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP910PI-20 EP910PI-25T
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.75 $9.75
Device Family Altera Classic EPLD Family —
Macrocells 24 24
Propagation Delay (tPD) 20 ns —
封装 PDIP-40 (PI suffix) 40-pin PDIP (600-mil)
安装类型 Through-Hole Through-Hole (DIP)
Supply Voltage (VCC) 5 V (+/- 5%) 5 V
工作温度 -40C to +85C (industrial) [DATA_NEEDED: operating temperature range]
Technology CMOS EPROM (UV-erasable windowed variants available) CMOS, UV-erasable EPROM
Configuration Method Non-volatile EPROM (no boot PROM required) —
Dedicated Inputs 12 —
Bidirectional I/O Pins 24 —
Maximum Counter Frequency 125 MHz —
Output Drive Current (IOL) 24 mA (TTL-compatible) —
Programmable Polarity Yes (XOR gate per macrocell) —
Macrocell Flip-Flop Yes (D-type, programmable) —
Power Dissipation [DATA_NEEDED: typical power dissipation in mW] —
Programming Interface JEDEC file via Altera programming hardware —
RoHS 状态 unknown [DATA_NEEDED: RoHS compliance]
MIL-STD-883 Variant EP910DM/883B (separate part number) —
Family — Altera Classic EPLD Family
Equivalent Gates — 900 (SSI/MSI equivalent)
Maximum Inputs — 36
Maximum Outputs — 24
Propagation Delay (tpd) — 25 ns
Programming — UV-erasable
Lead-Free — [DATA_NEEDED: lead-free status]
Static Power — <100 mW (typical CMOS)

数据手册与资源

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