EPC1213PC8 vs EPC144IPC8N 对比
详细并排对比 EPC1213PC8 出自 Altera 和 EPC144IPC8N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPC1213PC8 | EPC144IPC8N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | Memory ICs | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $10.95 | $2.50 |
| 存储器类型 | OTP Configuration PROM (EEPROM cell) | — |
| 存储容量 | 212 Kbit | — |
| 接口 | Serial (4-wire: nCS, DCLK, DATA, OE) | Serial / Parallel SelectMap |
| Configuration Mode Supported | FLEX/APEX FPP / PS serial | — |
| 最大时钟频率 | 6 MHz | — |
| 电源电压 | 3.0 V to 3.6 V | — |
| Programmability | One-Time Programmable (OTP) | — |
| Programming Standard | IEEE Std 1532 / Jam STAPL | — |
| Standby Current | < 50 µA typical | — |
| 工作温度 | 0 °C to +70 °C (Commercial) | — |
| 封装 | 8-Pin PDIP (R-PDIP-T8) | PDIP-8 |
| 安装类型 | Through-Hole | — |
| 引脚数量 | 8 | — |
| RoHS 状态 | Compliant (post-lead-free Altera revision) | [DATA_NEEDED: RoHS compliance confirmation] |
| Lead-Free | Yes | — |
| JEDEC Package Code | R-PDIP-T8 | — |
| Device Family | — | Enhanced Configuration Device (EPC) |
| Manufacturer | — | Altera (now part of Intel) |
| 功能 | — | FPGA Configuration Memory |
| JTAG / IEEE 1149.1 | — | Yes (built-in) |
| Configuration Clock (DCLK) | — | Internal oscillator generated |
| Core Voltage | — | 3.3 V |
| Target FPGA I/O Voltages | — | 1.8 V / 2.5 V / 3.3 V / 5 V |
| 工作温度范围 | — | -40 C to +85 C (Industrial, 'I' suffix) |
| Lead-Free / Pb-Free | — | Yes ('N' suffix) |
| In-System Programmable | — | Yes (via JTAG) |
| Cascade Support | — | Yes (multiple EPCs cascadable for larger bitstreams) |
| Configuration Mode | — | Slave-serial, slave-parallel (PS mode) |