EPC1664PI8 vs EPC144PI8 对比

详细并排对比 EPC1664PI8 出自 Altera 和 EPC144PI8 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC1664PI8 EPC144PI8
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $8.75 $7.25
Memory Density 16 Mb (16,777,216 bits) 144 Kbit (144,096 bits)
Device Family Enhanced Configuration Device (EPC) —
Supported FPGA Families Stratix, Cyclone, APEX II, APEX 20K, Mercury, ACEX 1K —
Configuration Interface Serial (DATA, DCLK, nCONFIG, CONF_DONE) —
Programming Interface JTAG / ByteBlaster / MasterBlaster —
Cascade Support Yes - two EPC devices can be chained —
In-System Programmable Yes (ISP via JTAG) —
电源电压 [DATA_NEEDED: VCC range from datasheet] —
工作温度 [DATA_NEEDED: industrial/commercial range] -40C to +85C (industrial, 'I' suffix)
封装 PDIP-8 (PI8) PDIP-8 (300 mil)
安装类型 Through-Hole Through-hole (THT)
RoHS 状态 [DATA_NEEDED: from datasheet] [DATA_NEEDED: RoHS compliance]
Lead-Free [DATA_NEEDED: from datasheet] [DATA_NEEDED: lead-free status]
MSL 等级 [DATA_NEEDED: from datasheet] Not applicable (through-hole)
Read-Back Support Yes (verify/blank-check) —
存储器类型 — OTP Serial Configuration EPROM (UV-erasable package option available)
接口 — 4-wire serial (DCLK, DATA, nCS, nINIT_STATUS)
Configuration Clock (max) — [DATA_NEEDED: DCLK maximum frequency]
Supply Voltage VCC — [DATA_NEEDED: VCC operating range]
引脚数量 — 8
Process Technology — CMOS EPROM (1.8 V core option per suffix '8')
Programmability — One-Time Programmable (OTP) per bitstream; UV-erasable window package variant also exists
Target FPGA Compatibility — Altera FLEX 6000, FLEX 8000, FLEX 10K, APEX 20K (legacy)
nINIT_STATUS Output — Open-drain, active-low (per datasheet family convention)
Power-On Reset — Internal automatic (per datasheet family convention)

数据手册与资源

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