EPC16JC88 vs EPC164C88N 对比
详细并排对比 EPC16JC88 出自 Altera 和 EPC164C88N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPC16JC88 | EPC164C88N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | Memory ICs | Memory ICs |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $17.95 | $7.20 |
| Manufacturer | Altera (now Intel FPGA) | — |
| Family | Enhanced Configuration Device (EPC4 / EPC8 / EPC16) | — |
| Device Function | In-system programmable configuration PROM for SRAM-based FPGAs | — |
| Density | 16 Mbit | — |
| Programmability | In-system programmable via IEEE 1149.1 JTAG | — |
| Configuration Interface | Altera/Intel serial configuration (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE) | Altera passive serial / fast passive parallel |
| 封装 | 88-ball UBGA (11 x 8 mm), JEDEC designation C88 | 88-pin UBGA (Ultra FineLine BGA) 11x8 mm |
| Operating Temperature Grade | Industrial (J suffix) | — |
| 电源电压 | [DATA_NEEDED: VCC operating range] | — |
| Supported FPGA Families | Altera/Intel Stratix, Cyclone, APEX, Arria (via configuration interface) | — |
| Configuration Clock | Driven by target FPGA during configuration | — |
| Programming Interface | JTAG (IEEE 1149.1) 4-wire TCK/TMS/TDI/TDO | IEEE 1149.1 JTAG (in-system programmable) |
| Multi-Device Configuration | Supports daisy-chain configuration of multiple FPGAs | — |
| 湿敏等级（MSL） | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance declaration] | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | [DATA_NEEDED: lead-free finish] | [DATA_NEEDED: lead-free status] |
| 无卤 | [DATA_NEEDED: halogen-free status] | — |
| 功能 | — | In-system programmable configuration PROM for SRAM-based FPGAs |
| Memory Density | — | 16 Mbit |
| Operating Voltage (VCCINT) | — | 3.3 V typical |
| Supported FPGA Voltages | — | 1.8 V, 2.5 V, 3.3 V, 5.0 V |
| 安装类型 | — | Surface Mount (BGA) |
| 工作温度范围 | — | [DATA_NEEDED: industrial or commercial grade] |
| MSL 等级 | — | [DATA_NEEDED: MSL classification] |
| REACH Status | — | [DATA_NEEDED: REACH compliance] |
| Compatible FPGA Families | — | Cyclone, Cyclone II, Cyclone III, Stratix, Stratix II, Stratix III, Stratix GX, Stratix II GX, HardCopy II |
| Configuration Mode | — | Passive Serial (PS), Fast Passive Parallel (FPP) |
| Reprogrammability | — | Yes (in-system via JTAG) |