EPC16QC100II vs EPC16Q100 对比

详细并排对比 EPC16QC100II 出自 Altera 和 EPC16Q100 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC16QC100II EPC16Q100
品牌 Altera Intel
分类 Memory ICs Memory ICs
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $10.75 $9.75
存储器类型 FPGA Configuration PROM (Flash-based) Flash Configuration PROM
Memory Density 16 Mbit —
Supported FPGA Families APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, FLEX 8000, Cyclone —
Configuration Mode FPP / PSA (Fast Passive Parallel / Passive Serial Asynchronous) —
Programmability In-System Programmable via IEEE 1149.1 (JTAG) In-system programmable via JTAG (IEEE 1149.1)
Cascade Support Yes (multi-PROM cascading supported) —
Core Supply Voltage 3.3 V —
I/O Tolerance 5 V tolerant configuration pins —
封装 100-pin PQFP (Plastic Quad Flat Pack) 100-pin PQFP (20 x 14 mm)
Package Dimensions 20 mm x 14 mm, 0.5 mm pitch —
Lead Finish Matte Tin (lead-free) —
工作温度 -40C to +85C (Industrial) -40C to +85C (industrial)
MSL 等级 3 (per JEDEC J-STD-020) [DATA_NEEDED: MSL rating]
RoHS 状态 Compliant Compliant (lead-free version)
Configuration Pins DCLK, DATA[0..n], nCONFIG, nSTATUS, CONF_DONE, OE —
Compression Support Yes (reduces on-PROM footprint vs uncompressed bitstream) On-chip controller supports bitstream compression
存储容量 — 16 Mb
电源电压 — 3.3 V
Configuration Interface — Serial/parallel Altera FPGA configuration protocol
I/O Voltage Tolerance — 3.3 V and 5 V tolerant
安装类型 — Surface Mount
Write Protection — Hardware write protection pin
Configuration Clock — Dedicated DCLK output to FPGA
JTAG Chain Support — Yes (multi-device chain capable)
Family — Altera Enhanced Configuration Device (EPC4/EPC8/EPC16)

数据手册与资源

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