EPC16QC100N vs EPC16JC88 对比

详细并排对比 EPC16QC100N 出自 Altera 和 EPC16JC88 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC16QC100N EPC16JC88
品牌 Altera Altera
分类 Memory ICs Memory ICs
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $24.10 $17.95
存储容量 16 Mbit (16,777,216 bits) —
Programmable Type In System Programmable —
Configuration Clock Frequency 33 MHz max —
On-Chip Decompression Yes (supports compressed bitstreams) —
Supply Voltage (VCC) 3.0 V to 3.6 V —
Access Time 90 ns typical —
Flash Read Bandwidth 160 Mbps (16-bit DQ at 10 MHz) —
Configuration Interface FPP / PS / AS via dedicated FPGA pins Altera/Intel serial configuration (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE)
JTAG (IEEE 1149.1) ISP Supported —
工作温度 0 C to 70 C —
封装 100-pin PQFP (20 x 14 mm) 88-ball UBGA (11 x 8 mm), JEDEC designation C88
安装类型 Surface Mount —
Lead Free Yes (per datasheet) —
Packaging Tray —
Supported FPGA Families ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX Altera/Intel Stratix, Cyclone, APEX, Arria (via configuration interface)
Manufacturer — Altera (now Intel FPGA)
Family — Enhanced Configuration Device (EPC4 / EPC8 / EPC16)
Device Function — In-system programmable configuration PROM for SRAM-based FPGAs
Density — 16 Mbit
Programmability — In-system programmable via IEEE 1149.1 JTAG
Operating Temperature Grade — Industrial (J suffix)
电源电压 — [DATA_NEEDED: VCC operating range]
Configuration Clock — Driven by target FPGA during configuration
Programming Interface — JTAG (IEEE 1149.1) 4-wire TCK/TMS/TDI/TDO
Multi-Device Configuration — Supports daisy-chain configuration of multiple FPGAs
湿敏等级(MSL) — [DATA_NEEDED: MSL rating per JEDEC J-STD-020]
RoHS 状态 — [DATA_NEEDED: RoHS compliance declaration]
Lead-Free — [DATA_NEEDED: lead-free finish]
无卤 — [DATA_NEEDED: halogen-free status]

数据手册与资源

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