EPC16UC88 vs EPC16UC88N 对比

详细并排对比 EPC16UC88 出自 Altera 和 EPC16UC88N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC16UC88 EPC16UC88N
品牌 Altera Altera
分类 Memory ICs FPGA & CPLD
生命周期状态 Unknown 不推荐新设计
库存状态 有库存 有库存
单价(USD) $0.00 $9.75
Device Type In-system programmable configuration PROM for FPGAs —
Configuration Memory Capacity 16 Mb —
电源电压 3.3 V core and I/O —
封装 88-UBGA (11x8) —
Package Family UBGA —
In-System Programmability IEEE Std. 1532 compatible —
Programming Language Support Jam Standard Test and Programming Language (STAPL) —
JTAG Boundary Scan Supported Yes (IEEE 1149.1)
nINIT_CONF Function Allows private JTAG instruction to start FPGA configuration —
Configuration Architecture Configuration controller and flash memory —
FPGA Configuration Use Automatic configuration after power-up or system initialization —
Data Output Configuration data output controlled by OE and nCS —
Output Control OE and nCS control tri-state buffer and address counter —
安装类型 Surface mount Surface Mount
Package Dimensions 11 mm x 8 mm —
RoHS 状态 [DATA_NEEDED: RoHS status] —
REACH Status [DATA_NEEDED: REACH status] —
工作温度 [DATA_NEEDED: operating temperature] 0 °C to +70 °C
Output Current [DATA_NEEDED: output current] —
Configuration Frequency [DATA_NEEDED: configuration frequency] —
AEC-Q100 Qualification [DATA_NEEDED: AEC-Q100 qualification] —
存储容量 — 16 Mbit (16,777,216 bits)
Programmable Type — In System Programmable
Supply Voltage (Vcc) — 3.0 V to 3.6 V
Configuration Modes — Passive Serial (PS), Passive Parallel Synchronous (PPS), Passive Parallel Asynchronous (PPA), JTAG
On-Chip Decompression — Yes (Altera proprietary)
封装 / 外壳 — 88-UBGA (11x8 mm) / 88-LFBGA
引脚数量 — 88
Bus-Hold on Data Lines — Yes
Standby Mode — Yes (reduced power consumption)
Programming Interface — JTAG (in-system) / Serial (in-system)
On-Chip Oscillator — Yes (internal configuration clock)
Lead-Free / RoHS — Lead-Free (per datasheet)
Packaging — Tray

数据手册与资源

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