EPC16UC88N vs EPC16UI88 对比
详细并排对比 EPC16UC88N 出自 Altera 和 EPC16UI88 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPC16UC88N | EPC16UI88 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.75 | $5.21 |
| 存储容量 | 16 Mbit (16,777,216 bits) | — |
| Programmable Type | In System Programmable | — |
| Supply Voltage (Vcc) | 3.0 V to 3.6 V | — |
| Configuration Modes | Passive Serial (PS), Passive Parallel Synchronous (PPS), Passive Parallel Asynchronous (PPA), JTAG | — |
| On-Chip Decompression | Yes (Altera proprietary) | — |
| 封装 / 外壳 | 88-UBGA (11x8 mm) / 88-LFBGA | — |
| 引脚数量 | 88 | — |
| 工作温度 | 0 °C to +70 °C | -40C to +85C (industrial) |
| Bus-Hold on Data Lines | Yes | — |
| Standby Mode | Yes (reduced power consumption) | — |
| JTAG Boundary Scan | Yes (IEEE 1149.1) | — |
| Programming Interface | JTAG (in-system) / Serial (in-system) | IEEE 1149.1 JTAG (in-system programmable) |
| On-Chip Oscillator | Yes (internal configuration clock) | — |
| Lead-Free / RoHS | Lead-Free (per datasheet) | — |
| 安装类型 | Surface Mount | Surface Mount |
| Packaging | Tray | — |
| Memory Density | — | 16 Mb (2 MB) |
| Configuration Interface | — | Altera Passive Serial / Passive Parallel (Sync & Async) / JTAG |
| Core Supply Voltage | — | 3.3 V |
| Maximum Configuration Clock | — | 100 MHz |
| Cascading Support | — | Multi-device configuration chains |
| Supported FPGA Families | — | Altera Cyclone II/III/IV, Stratix II/III, APEX II |
| 封装 | — | 88-ball UBGA (Ultra FineLine BGA), 11x8 mm |
| Standby Current | — | [DATA_NEEDED: standby current] |
| Active Configuration Current | — | [DATA_NEEDED: active configuration current] |
| Programming Cycles | — | [DATA_NEEDED: programming endurance cycles] |
| RoHS 状态 | — | Compliant |
| Configuration Time | — | [DATA_NEEDED: configuration time for typical 16 Mb bitstream] |