EPC21LC20 vs EPC2LC20 对比

详细并排对比 EPC21LC20 出自 Intel 和 EPC2LC20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC21LC20 EPC2LC20
品牌 Intel Altera
分类 Memory ICs Memory ICs
生命周期状态 有效 不推荐新设计
库存状态 有库存 有库存
单价(USD) $10.40 $7.20
存储器类型 Serial Configuration PROM (Flash-based, in-system programmable) Non-volatile configuration PROM
Density 2 Mb (2,097,152 bits) —
Configuration Mode Supported Serial (PS) for Altera SRAM-based LUT FPGAs —
Maximum DCLK Frequency 10 MHz —
Access Time approximately 35 ns [DATA_NEEDED: confirm exact datasheet figure] —
Programming Interface IEEE 1149.1 (JTAG) IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant
Program/Erase Endurance 100 cycles minimum [DATA_NEEDED: confirm from datasheet] —
Operating Voltage (VCC) 3.0 V to 3.6 V (3.3 V typical) —
Standby Current [DATA_NEEDED: ICCSB value] —
Active Read Current [DATA_NEEDED: ICC active current] —
Operating Temperature (commercial) 0 °C to +70 °C (LC suffix) —
Operating Temperature (industrial) [DATA_NEEDED: -40 to +85 °C for LI variant] —
封装 / 外壳 20-pin PLCC (J-lead, JEDEC MS-018) —
安装类型 Surface Mount (PLCC socket or solder) Surface Mount
MSL 等级 [DATA_NEEDED: confirm moisture sensitivity level] —
RoHS 状态 [DATA_NEEDED: confirm from Altera product page] Non-Compliant (original Altera Pb-containing part)
Lead-Free (Pb-free) [DATA_NEEDED: confirm] —
Compatible FPGA Families ACEX, APEX, Cyclone, FLEX, Mercury, Stratix (SRAM-based LUT) —
JTAG Boundary-Scan Compliant Yes (IEEE Std 1149.1) —
Data Width 1 bit (serial DATA output) —
存储容量 — 1.6 Mbit
Configuration Interface — Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE
Supply Voltage VCC — 3.0 V to 3.6 V (3.3-V operation)
ISP Voltage Range — 5.0 V or 3.3 V
Supported FPGA Families — ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000
Cascade Support — Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams
封装 — 20-pin PLCC (J-lead, 9x9 mm)
工作温度 — -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet]
Lead-Free Version — EPC2LC20N available as lead-free equivalent
Programming Support — Altera Programming Unit (APU), Quartus II, JTAG programmer
Boundary-Scan — IEEE 1149.1 compliant, 8-bit or 16-bit JTAG

数据手册与资源

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