EPC2LC20-V vs EPC2LC20-U 对比

详细并排对比 EPC2LC20-V 出自 Altera 和 EPC2LC20-U 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC2LC20-V EPC2LC20-U
品牌 Altera Altera
分类 Memory ICs Memory ICs
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.45 $9.60
存储器类型 Configuration PROM (Flash-based, in-system programmable) Configuration PROM (Flash, in-system programmable)
Memory Density 1.6 Mbit —
Configuration Interface Serial (Altera FPP/PS modes via DCLK/nSTATUS/CONF_DONE) —
Maximum Configuration Clock 10 MHz —
Supply Voltage VCC 3.3 V —
I/O Tolerance 5 V tolerant on configuration pins —
In-System Programming Yes, via IEEE 1149.1 JTAG (TMS/TCK/TDI/TDO) —
Cascade Support Yes, daisy-chainable for >1.6 Mbit designs Yes (multi-PROM for larger bitstreams)
Operating Temperature Range (V suffix) 0 °C to +70 °C (commercial) —
Package Type 20-pin PLCC (JEDEC MS-018) —
Package Dimensions 9 x 9 mm body, 1.27 mm pitch —
安装类型 Surface Mount (PLCC socket compatible) Surface Mount
Supported FPGA Families APEX 20K, ACEX 1K, FLEX 10K, FLEX 6000, MAX 9000 ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K
RoHS 状态 Compliant (per distributor listings) [DATA_NEEDED: RoHS compliance status]
Lead-Free Yes [DATA_NEEDED: lead-free status]
存储容量 — 1.6 Mbit
接口 — Serial (4-wire Altera configuration) + JTAG (IEEE 1149.1)
Max Configuration Clock — 10 MHz
Supply Voltage (VCC) — 3.3 V (3.0 V to 3.6 V)
Programmable — In-system via JTAG
封装 — 20-PLCC (9x9)
工作温度 — [DATA_NEEDED: full operating temperature range]
JTAG Support — Yes (IEEE 1149.1 boundary-scan)
MSL 等级 — [DATA_NEEDED: moisture sensitivity level]

数据手册与资源

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