EPC2LC20-V vs EPC2LI20 对比

详细并排对比 EPC2LC20-V 出自 Altera 和 EPC2LI20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC2LC20-V EPC2LI20
品牌 Altera Altera
分类 Memory ICs Memory ICs
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $9.45 $5.95
存储器类型 Configuration PROM (Flash-based, in-system programmable) Flash (in-system programmable)
Memory Density 1.6 Mbit —
Configuration Interface Serial (Altera FPP/PS modes via DCLK/nSTATUS/CONF_DONE) Serial or Byte-wide (parallel)
Maximum Configuration Clock 10 MHz —
Supply Voltage VCC 3.3 V —
I/O Tolerance 5 V tolerant on configuration pins —
In-System Programming Yes, via IEEE 1149.1 JTAG (TMS/TCK/TDI/TDO) —
Cascade Support Yes, daisy-chainable for >1.6 Mbit designs —
Operating Temperature Range (V suffix) 0 °C to +70 °C (commercial) —
Package Type 20-pin PLCC (JEDEC MS-018) —
Package Dimensions 9 x 9 mm body, 1.27 mm pitch —
安装类型 Surface Mount (PLCC socket compatible) Surface Mount (PLCC socket-compatible)
Supported FPGA Families APEX 20K, ACEX 1K, FLEX 10K, FLEX 6000, MAX 9000 —
RoHS 状态 Compliant (per distributor listings) [DATA_NEEDED: RoHS status]
Lead-Free Yes —
存储容量 — 1.6 Mb (1,572,864 bits)
Programmable Type — In System Programmable (ISP)
功能 — Configuration PROM for SRAM-based FPGAs
Supply Voltage - Operating — 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing)
工作温度 — -40 C to +85 C (Industrial)
封装 / 外壳 — 20-PLCC (J-lead, 9x9 mm)
Decompression — On-chip (supports compressed bitstreams)
JTAG / ISP Interface — IEEE 1532 (TCK, TMS, TDI, TDO)
Multi-Device Support — Yes (daisy-chain configuration)
User-Accessible Memory — Yes (unused flash available to user logic)
MSL 等级 — [DATA_NEEDED: MSL level]

数据手册与资源

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