EPC2LC20N vs EPC2LC20-U 对比

详细并排对比 EPC2LC20N 出自 Intel 和 EPC2LC20-U 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC2LC20N EPC2LC20-U
品牌 Intel Altera
分类 Memory ICs Memory ICs
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $7.40 $9.60
功能 In-System Programmable Configuration PROM for SRAM-based FPGAs —
存储容量 1.6 Mbit 1.6 Mbit
存储器类型 Flash Configuration PROM (Flash, in-system programmable)
Programmable Type In System Programmable (ISP) —
Supply Voltage VCCINT 3.0 V to 3.6 V —
Supply Voltage VCCIO 4.75 V to 5.25 V —
Configuration Clock Frequency 8 MHz (max) —
接口 Serial (DATA0, DCLK, nCONFIG, nSTATUS, CONF_DONE) Serial (4-wire Altera configuration) + JTAG (IEEE 1149.1)
JTAG Support IEEE 1149.1 / IEEE 1532 compliant Yes (IEEE 1149.1 boundary-scan)
封装 20-pin PLCC (J-Lead, 9x9 mm) 20-PLCC (9x9)
安装类型 Surface Mount Surface Mount
Packaging Tube —
工作温度 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: full operating temperature range]
Supported FPGA Families Altera APEX, Cyclone, Stratix, ACEX, MAX 7000 ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Max Configuration Clock — 10 MHz
Supply Voltage (VCC) — 3.3 V (3.0 V to 3.6 V)
Programmable — In-system via JTAG
Cascade Support — Yes (multi-PROM for larger bitstreams)
Lead-Free — [DATA_NEEDED: lead-free status]
MSL 等级 — [DATA_NEEDED: moisture sensitivity level]

数据手册与资源

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