EPC2T32U-CAF48 vs EPC2T32N 对比

详细并排对比 EPC2T32U-CAF48 出自 Altera 和 EPC2T32N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC2T32U-CAF48 EPC2T32N
品牌 Altera Altera
分类 Memory ICs FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $17.60 $6.95
存储器类型 Non-volatile flash configuration memory —
Memory Density 2 Mb (2097152 bits) —
Configuration Interface Altera FPP (8-bit) / PS (4-wire) / AS (serial) —
Maximum Configuration Clock (DCLK) 8 MHz —
Supply Voltage (VCC) 3.3 V (typical) —
I/O Tolerance 5 V tolerant —
Program/Erase Endurance 10,000 cycles per sector minimum —
Data Retention 20 years minimum —
Programming Interface IEEE 1149.1 (JTAG) / IEEE 1532 —
封装 48-pin QFN (CAF suffix) 32-TQFP (7x7 mm)
安装类型 Surface Mount Surface Mount
工作温度 -40 C to +85 C (industrial grade, "U") 0 C to +70 C
MSL 等级 [DATA_NEEDED: MSL level] —
Lead-Free Finish Yes (CAF suffix indicates lead-free) —
RoHS 状态 Compliant Compliant (lead-free)
Supported FPGA Families Cyclone, Cyclone II, Stratix, APEX 20K, ACEX 1K, Mercury, Excalibur —
存储容量 — 1.6 Mbit
Programmable Type — In System Programmable (Flash)
Configuration Mode — Passive Serial (PS) / JTAG ISP
最大时钟频率 — 10 MHz
Supply Voltage - VCCINT — 3.0 V to 3.6 V / 4.75 V to 5.25 V (dual supply)
接口 — Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE)
JTAG Compliance — IEEE 1149.1 (boundary-scan, ISP)
引脚数量 — 32
Sector Architecture — Flash with built-in CRC
Cascade Support — Yes (multi-device daisy-chain)
CONF_DONE / nSTATUS Drive — Open-drain

数据手册与资源

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