EPC2T32U vs EPC2T132N 对比

详细并排对比 EPC2T32U 出自 Altera 和 EPC2T132N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC2T32U EPC2T132N
品牌 Altera Altera
分类 Memory ICs FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $16.10 $17.80
功能 Configuration PROM for SRAM-based LUT FPGAs —
Memory Density 1.6 Mbit —
电源电压 3.3 V or 5.0 V (user-selectable) 3.0 V to 3.6 V
Programmability In-system programmable via JTAG (IEEE 1149.1) —
Configuration Modes Supported Passive serial, passive parallel synchronous, passive parallel asynchronous, JTAG —
封装 32-pin TQFP TQFP-32 (T132)
工作温度 Commercial / Industrial grade [DATA_NEEDED: exact range] -40C to +85C (industrial)
Cascading Support Yes, via dedicated cascade port for density expansion —
Compression Support Altera bitstream decompression (up to 50% storage reduction) —
Compatible FPGA Families APEX II, APEX 20K, Mercury, ACEX 1K —
Lead-Free Finish Yes (per part suffix 'U') —
安装类型 Surface Mount Surface Mount
MSL 等级 [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL level]
RoHS 状态 Compliant [DATA_NEEDED: RoHS status]
Hand-shake Pins nSTATUS, nCONFIG, CONF_DONE —
存储器类型 — Flash (NOR, serial configuration)
Memory Capacity — 1.6 Mbit (2 Mbit raw, 1.6 Mbit usable)
Serial Clock Frequency — 10 MHz maximum
接口 — Altera serial configuration (4-wire JTAG for ISP)
Program/Erase Endurance — 100,000 cycles per sector
Data Retention — 20 years minimum
In-System Programmable — Yes (IEEE 1149.1 JTAG)
Configuration Compatibility — APEX II, APEX 20K, ACEX 1K, FLEX 10K/10KE/6000, Cyclone, Stratix, Mercury
Multi-Device Daisy Chain — Yes (supported)
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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