EPC2TC32U-CAF48 vs EPC2T32N 对比

详细并排对比 EPC2TC32U-CAF48 出自 Altera 和 EPC2T32N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC2TC32U-CAF48 EPC2T32N
品牌 Altera Altera
分类 Memory ICs FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $12.80 $6.95
存储器类型 Non-volatile configuration flash —
Configuration Memory Density 32 Mbit —
Supported FPGA Families APEX II, APEX 20K, Mercury, Stratix, Cyclone, ACEX 1K, FLEX 10K —
Programming Interface IEEE 1149.1 JTAG (ISP) —
Operating Voltage (VCC) 3.0 V to 3.6 V (3.3V nominal) —
I/O Bank Voltage (multiVolt) 1.8 V / 2.5 V / 3.3 V / 5.0 V —
工作温度范围 -40 C to +85 C (industrial grade) —
封装 32-pin TQFP 32-TQFP (7x7 mm)
Configuration Mode Serial (FPP / PS / AS via JTAG ISP) Passive Serial (PS) / JTAG ISP
Decompression Support Yes (Quartus-derived compressed bitstream) —
Multi-Device JTAG Chain Yes (nINIT_CONF / nSTATUS chaining) —
Replacement for EPC1 and EPC1441 legacy configuration devices —
RoHS 状态 Compliant per distributor listings Compliant (lead-free)
Lead-Free Yes —
MSL 等级 [DATA_NEEDED: MSL level] —
存储容量 — 1.6 Mbit
Programmable Type — In System Programmable (Flash)
最大时钟频率 — 10 MHz
Supply Voltage - VCCINT — 3.0 V to 3.6 V / 4.75 V to 5.25 V (dual supply)
接口 — Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE)
JTAG Compliance — IEEE 1149.1 (boundary-scan, ISP)
工作温度 — 0 C to +70 C
引脚数量 — 32
安装类型 — Surface Mount
Sector Architecture — Flash with built-in CRC
Cascade Support — Yes (multi-device daisy-chain)
CONF_DONE / nSTATUS Drive — Open-drain

数据手册与资源

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