EPC2TC32UCAF vs EPC2TC32HAF48 对比

详细并排对比 EPC2TC32UCAF 出自 Altera 和 EPC2TC32HAF48 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC2TC32UCAF EPC2TC32HAF48
品牌 Altera Intel
分类 FPGA & CPLD Memory ICs
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $9.95 $15.20
Device Type Configuration PROM (CPLD-style boot memory) —
Memory Density 1.6 Mbit —
Supported FPGA Families Altera APEX, Cyclone, Stratix, FLEX (LUT devices) —
Supply Voltage (VCC) 3.0 V to 3.6 V 3.3 V (typical)
I/O Logic Levels 3.3 V / 2.5 V compatible —
Configuration Interface FLEX passive serial / passive parallel synchronous / passive parallel asynchronous Altera EPC serial (DATA, DCLK, nCONFIG, nSTATUS, nCASC)
Programming Interface IEEE 1149.1 (JTAG) in-system programmable —
Daisy-Chain Support Yes (via nCASC pin, multi-device FLEX chain) —
Compression Support Altera bitstream compression compatible —
封装 32-pin TQFP (CAF48), 7x7 mm TQFP-48 (7x7x1.0 mm)
安装类型 Surface Mount Surface Mount
工作温度 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature grade]
MSL 等级 [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL rating]
RoHS 状态 [DATA_NEEDED: RoHS compliance status] —
Lead-Free [DATA_NEEDED: lead-free status] —
无卤 [DATA_NEEDED: halogen-free status] —
存储容量 — 32 Mbit (4 Mbyte)
功能 — FPGA Configuration PROM for SRAM-based LUT devices
In-System Programmability — Yes, via JTAG (IEEE 1149.1)
Cascade Support — Yes, multi-device daisy-chain via nCASC
FPGA Compatibility — Altera/Intel Cyclone, Stratix, APEX, ACEX families
Lead-Free / RoHS — [DATA_NEEDED: lead-free / RoHS status]
Programming Cycles — [DATA_NEEDED: program/erase endurance]
Configuration Clock (DCLK) — [DATA_NEEDED: maximum DCLK frequency]
Configuration Time (typical) — [DATA_NEEDED: configuration time]

数据手册与资源

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